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FEATURES
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LTC5541 1.3GHz to 2.3GHz High Dynamic Range Downconverting Mixer DESCRIPTION
The LTC(R)5541 is part of a family of high dynamic range passive, high gain downconverting mixers covering the 600MHz to 4GHz frequency range. The LTC5541 is optimized for 1.3GHz to 2.3GHz RF applications. The LO frequency must fall within the 1.4GHz to 2.0GHz range for optimum performance. A typical application is a LTE or W-CDMA receiver with a 1.7GHz to 2.2GHz RF input and low-side LO. The LTC5541 is designed for 3.3V operation, however; the IF amplifier can be powered by 5V for the highest P1dB. An integrated SPDT LO switch with fast switching accepts two active LO signals, while providing high isolation. The LTC5541's high conversion gain and high dynamic range enable the use of lossy IF filters in high-selectivity receiver designs, while minimizing the total solution cost, board space and system-level variation.
High Dynamic Range Downconverting Mixer Family PART# LTC5540 LTC5541 LTC5542 LTC5543 RF RANGE 600MHz -1.3GHz 1.3GHz - 2.3GHz 1.6GHz - 2.7GHz 2.3GHz - 4GHz LO RANGE 700MHz - 1.2GHz 1.4GHz - 2.0GHz 1.7GHz - 2.5GHz 2.4GHz - 3.6GHz
Conversion Gain: 7.8dB at 1950MHz IIP3: 26.4dBm at 1950MHz Noise Figure: 9.6dB at 1950MHz 16dB NF Under +5dBm Blocking High Input P1dB 3.3V Supply, 630mW Power Consumption Shutdown Pin 50 Single-Ended RF and LO Inputs LO Inputs 50 Matched when Shutdown High Isolation LO Switch 0dBm LO Drive Level High LO-RF and LO-IF Isolation Small Solution Size 20-Lead (5mm x 5mm) QFN package
APPLICATIONS
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Wireless Infrastructure Receivers (LTE, W-CDMA. TD-SCDMA, UMTS, GSM1800) Point-To-Point Microwave Links High Dynamic Range Downmixer Applications
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners.
TYPICAL APPLICATION
Wideband Receiver
1nF VCCIF 3.3V or 5V 1nF 150nH IF+ IMAGE BPF 2.2pF LNA RF LO IF IF - 22pF LTC5541 LO2 GC (dB) SYNTH 2 ALTERNATE LO FOR FREQUENCY-HOPPING 22pF SHDN (0V/3.3V) SHDN BIAS VCC2 VCC 3.3V 1F VCC1 22pF VCC3 LO1 LOSEL LO SELECT (0V/3.3V) SYNTH 1 LO 1760MHz
5541 TA01
190MHz SAW IF AMP
190MHz BPF ADC 8.8 8.6
Wideband Conversion Gain, IIP3 and NF vs IF Output Frequency
28 IIP3 26 24 IIP3 (dBm), SSB NF (dB) 22 20 18 16 14 12 10 NF 190 200 170 180 210 IF OUTPUT FREQUENCY (MHz) 8 220
1F
22pF
150nH
RF = 1950 30MHz 8.4 LO = 1760MHz P = 0dBm 8.2 LO TEST CIRCUIT IN FIGURE 1 8.0 7.8 7.6 7.4 7.2 7.0 6.8 160 GC
RF 1920MHz TO 1980MHz
5541 TA02
5541f
1
LTC5541 ABSOLUTE MAXIMUM RATINGS
(Note 1)
PIN CONFIGURATION
TOP VIEW IFBIAS IFGND 15 LO2 21 GND 14 VCC3 13 GND 12 GND 11 LO1 6 VCC2 7 LOBIAS 8 VCC1 9 10 LOSEL GND GND IF+ IF-
Mixer Supply Voltage (VCC1, VCC2)...........................3.8V LO Switch Supply Voltage (VCC3).............................3.8V IF Supply Voltage (IF+, IF -) ......................................5.5V Shutdown Voltage (SHDN) ................-0.3V to VCC +0.3V LO Select Voltage (LOSEL)................-0.3V to VCC +0.3V LO1, LO2 Input Power (1GHz to 3GHz) ...................9dBm LO1, LO2 Input DC Voltage ....................................0.5V RF Input Power (1GHz to 3GHz) ...........................15dBm RF Input DC Voltage ............................................... 0.1V Operating Temperature Range .................-40C to 85C Storage Temperature Range .................. -65C to 150C Junction Temperature (TJ) .................................... 150C
20 19 18 17 16 NC 1 RF 2 CT 3 GND 4 SHDN 5
UH PACKAGE 20-LEAD (5mm 5mm) PLASTIC QFN TJMAX = 150C, JA = 34C/W, JC = 3C/W EXPOSED PAD (PIN 21) IS GND, MUST BE SOLDERED TO PCB
ORDER INFORMATION
LEAD FREE FINISH LTC5541IUH#PBF TAPE AND REEL LTC5541IUH#TRPBF PART MARKING 5541 PACKAGE DESCRIPTION 20-Lead (5mm x 5mm) Plastic QFN TEMPERATURE RANGE -40C to 85C Consult LTC Marketing for parts specified with wider operating temperature ranges. Consult LTC Marketing for information on non-standard lead based finish parts. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
AC ELECTRICAL CHARACTERISTICS
PARAMETER LO Input Frequency Range RF Input Frequency Range IF Output Frequency Range RF Input Return Loss LO Input Return Loss IF Output Return Loss LO Input Power LO to RF Leakage LO to IF Leakage LO Switch Isolation RF to LO Isolation RF to IF Isolation Low-Side LO High-Side LO CONDITIONS
VCC = 3.3V, VCCIF = 3.3V, SHDN = Low, TA = 25C, PLO = 0dBm, unless otherwise noted. Test circuit shown in Figure 1. (Notes 2, 3, 4)
MIN TYP 1400 to 2000 1600 to 2300 1300 to 1800 5 to 500 >12 >12 >12 -4 0 <-32 <-31 52 50 >52 >33 6 MAX UNITS MHz MHz MHz MHz dB dB dB dBm dBm dBm dB dB dB dB
5541f
Requires External Matching ZO = 50, 1300MHz to 2300MHz ZO = 50, 1400MHz to 2000MHz Requires External Matching fLO = 1400MHz to 2000MHz fLO = 1400MHz to 2000MHz fLO = 1400MHz to 2000MHz LO1 Selected, 1400MHz < fLO < 2000MHz LO2 Selected, 1400MHz < fLO < 2000MHz fRF = 1300MHz to 2300MHz fRF = 1300MHz to 2300MHz
2
LTC5541
VCC = 3.3V, VCCIF = 3.3V, SHDN = Low, TA = 25C, PLO = 0dBm, PRF = -3dBm (f = 2MHz for two-tone IIP3 tests),unless otherwise noted. Test circuit shown in Figure 1. (Notes 2, 3, 4)
Low-Side LO Downmixer Application: RF = 1700 to 2200MHz, IF = 190MHz, fLO = fRF -fIF PARAMETER Conversion Gain CONDITIONS RF = 1750MHz RF = 1950MHz RF = 2150MHz RF = 1950 30MHz, LO = 1760MHz, IF=190 30MHz TA = -40C to +85C, RF = 1950MHz RF = 1750MHz RF = 1950MHz RF = 2150MHz RF = 1750MHz RF = 1950MHz RF = 2150MHz fRF = 1950MHz, fLO = 1760MHz, fBLOCK = 2050MHz, PBLOCK = 5dBm fRF = 1855MHz at -10dBm, fLO = 1760MHz, fIF = 190MHz fRF = 1823.33MHz at -10dBm, fLO = 1760MHz, fIF = 190MHz RF = 1950MHz, VCCIF = 3.3V RF = 1950MHz, VCCIF = 5V CONDITIONS RF = 1450MHz RF = 1600MHz RF = 1750MHz RF = 1600MHz 30MHz, LO = 1790MHz, IF = 190 30MHz TA = -40C to 85C, RF = 1600MHz RF = 1450MHz RF = 1600MHz RF = 1750MHz RF = 1450MHz RF = 1600MHz RF = 1750MHz fRF = 1600MHz, fLO = 1790MHz, fIF = 190MHz fBLOCK = 1500MHz, PBLOCK = 5dBm fRF = 1695MHz at -10dBm, fLO = 1790MHz fIF = 190MHz fRF = 1726.67MHz at -10dBm, fLO = 1790MHz fIF = 190MHz RF = 1750MHz, VCCIF = 3.3V RF = 1750MHz, VCCIF = 5V MIN 24.0 MIN 6.5 TYP 8.6 7.8 7.6 0.1 -0.006 25.5 26.4 25.5 9.2 9.6 10.6 16 -67 -73 11.3 14.6 TYP 8.9 8.4 8.0 0.1 -0.006 24.5 24.6 24.3 9.5 9.9 9.9 18 MAX 11.7 MAX UNITS dB dB dB/C dBm
AC ELECTRICAL CHARACTERISTICS
Conversion Gain Flatness Conversion Gain vs Temperature Input 3rd Order Intercept
SSB Noise Figure
dB dB dBc dBc dBm
SSB Noise Figure Under Blocking 2RF - 2LO Output Spurious Product (fRF = fLO + fIF/2) 3RF - 3LO Output Spurious Product (fRF = fLO + fIF/3) Input 1dB Compression
High-Side LO Downmixer Application: RF = 1300-1800MHz, IF = 190MHz, fLO = fRF +fIF PARAMETER Conversion Gain UNITS dB
Conversion Gain Flatness Conversion Gain vs Temperature Input 3rd Order Intercept
dB dB/C dBm
SSB Noise Figure
dB
SSB Noise Figure Under Blocking 2LO - 2RF Output Spurious Product (fRF = fLO - fIF/2) 3LO - 3RF Output Spurious Product (fRF = fLO - fIF/3) Input 1dB Compression
dB dBc
-69 dBc -74 11.1 14.4 dBm
5541f
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LTC5541
noted. Test circuit shown in Figure 1. (Note 2)
PARAMETER Power Supply Requirements (VCC, VCCIF) VCC Supply Voltage (Pins 6, 8 and 14) VCCIF Supply Voltage (Pins 18 and 19) VCC Supply Current (Pins 6 + 8 + 14) VCCIF Supply Current (Pins 18 + 19) Total Supply Current (VCC + VCCIF) Total Supply Current - Shutdown SHDN Input High Voltage (Off) SHDN Input Low Voltage (On) SHDN Input Current Turn On Time Turn Off Time LO Select Logic Input (LOSEL) Low = LO1 Selected, High = LO2 Selected LOSEL Input High Voltage LOSEL Input Low Voltage LOSEL Input Current LO Switching Time Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: The LTC5541 is guaranteed functional over the operating temperature range from -40C to 85C. -0.3V to VCC + 0.3V -20 50 3 0.3 30 V V A ns -0.3V to VCC + 0.3V -20 1 1.5 SHDN = High 3 0.3 30 Shutdown Logic Input (SHDN) Low = On, High = Off V V A s s 3.1 3.1 3.3 3.3 92 100 192 3.5 5.3 108 120 228 500 V V mA A
DC ELECTRICAL CHARACTERISTICS
CONDITIONS
VCC = 3.3V, VCCIF = 3.3V, SHDN = Low, TA = 25C, unless otherwise
MIN TYP MAX UNITS
Note 3: SSB Noise Figure measurements performed with a small-signal noise source, bandpass filter and 6dB matching pad on RF input, bandpass filter and 6dB matching pad on the LO input, and no other RF signals applied. Note 4: LO switch isolation is measured at the IF output port at the IF frequency with fLO1 and fLO2 offset by 2MHz.
TYPICAL DC PERFORMANCE CHARACTERISTICS
VCC Supply Current vs Supply Voltage (Mixer and LO Switch)
100 98 96 SUPPLY CURRENT (mA) SUPPLY CURRENT(mA) 94 92 90 88 86 84 82 80 3.0 3.1 3.4 3.2 3.3 3.5 VCC SUPPLY VOLTAGE (V) 3.6
5541 G01
SHDN = Low, Test circuit shown in Figure 1.
VCCIF Supply Current vs Supply Voltage (IF Amplifier)
125 220 210 SUPPLY CURRENT(mA) 200 190 180 170 -40C 75 3.0 3.3 3.6 3.9 4.2 4.5 4.8 5.1 VCCIF SUPPLY VOLTAGE (V) 5.4
Total Supply Current vs Temperature (VCC + VCCIF)
VCC = 3.3V, VCCIF = 5V (DUAL SUPPLY)
115 85C 25C -40C
85C
105 25C 95
VCC = VCCIF = 3.3V (SINGLE SUPPLY)
85
160 -45
-25
55 -5 15 35 TEMPERATURE (C)
75
95
5541 G02
5541 G03
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LTC5541
Low-Side LO VCC = 3.3V, VCCIF = 3.3V, SHDN = Low, TA = 25C, PLO = 0dBm, PRF = -3dBm (-3dBm/tone for two-tone IIP3 tests, f = 2MHz), IF = 190MHz, unless otherwise noted. Test circuit shown in Figure 1. Conversion Gain, IIP3 and NF vs RF Frequency
28 26 GC (dB), IIP3 (dBm), SSB NF (dB) 24 LO LEAKAGE (dBm) 22 20 18 16 14 12 10 8 6 1.65 1.75 30 GC 1.85 1.95 2.05 RF FREQUENCY (GHz) 2.15 2.25 -60 1.2 1.4 1.6 1.8 2.0 LO FREQUENCY (GHz) 2.2
5541 G05
TYPICAL AC PERFORMANCE CHARACTERISTICS
LO Leakage vs LO Frequency
-20
RF Isolation vs RF Frequency
65 60
IIP3
-30 ISOLATION (dB) LO-IF -40 LO-RF -50
55 50 45 40 35
RF-LO
RF-IF
NF
25 1.3
1.5
1.7 1.9 2.1 RF FREQUENCY (GHz)
2.3
5541 G06
5541 G04
1750MHz Conversion Gain, IIP3 and NF vs LO Power
27 25 23 GC (dB), IIP3 (dBm) 21 19 17 15 13 11 9 7 -6 -4 4 -2 0 2 LO INPUT POWER (dBm) 6
5541 G07
1950MHz Conversion Gain, IIP3 and NF vs LO Power
20 18 27 25 23 GC (dB), IIP3 (dBm) 21 19 17 15 13 11 9 7 -6 -4 4 -2 0 2 LO INPUT POWER (dBm) 6
5541 G08
2150MHz Conversion Gain, IIP3 and NF vs LO Power
20 26 24 IIP3 22 GC (dB), IIP3 (dBm) 20 18 16 14 12 10 8 6 -6 -4 4 -2 0 2 LO INPUT POWER (dBm) 6
5541 G09
IIP3
21 19 85C 17 25C -40C 15 13 11 NF 9 7 5 GC 3 1
IIP3
18 85C 16 25C -40C 14 12 10 NF 8 6 4
85C 25C 14 -40C 12 NF 10 8 6 GC 4 2 0
16
SSB NF (dB)
SSB NF (dB)
SSB NF (dB)
GC
2 0
Conversion Gain, IIP3 and NF vs Supply Voltage (Single Supply)
27 25 23 GC (dB), IIP3 (dBm) 21 19 17 15 13 11 9 7 3.0 GC NF IIP3 20 18 85C 16 25C -40C 14 12 10 8 6 29 27 25 GC (dB), IIP3 (dBm) 23 21 19 17 15 13 11 9
Conversion Gain, IIP3 and NF vs IF Supply Voltage (Dual Supply)
22 IIP3 20 85C 25C 16 -40C 14 NF 12 10 8 RF = 1950MHz 6 VCC = 3.3V 4 2 3.6 3.9 4.2 4.5 4.8 5.1 VCCIF SUPPLY VOLTAGE (V) 0 5.4 18 GC (dB), IIP3 (dBm), P1dB (dBm) 28 26 24 22 20 18 16 14 12 10 8
1950MHz Conversion Gain, IIP3 and RF Input P1dB vs Temperature
IIP3
VCCIF = 5.0V VCCIF = 3.3V
SSB NF (dB)
SSB NF (dB)
P1dB
RF = 1950MHz VCC = VCCIF 4 2 3.5 3.1 3.2 3.3 3.4 VCC, VCCIF SUPPLY VOLTAGE (V) 0 3.6
5541 G10
GC
7 3.0
3.3
GC 6 -45 -25
-5 15 35 55 TEMPERATURE (C)
75
95
5541 G11
5541 G12
5541f
5
LTC5541
Low-Side LO (continued) VCC = 3.3V, VCCIF = 3.3V, SHDN = Low, TA = 25C, PLO = 0dBm, PRF = -3dBm (-3dBm/tone for two-tone IIP3 tests, f = 2MHz), IF = 190MHz, unless otherwise noted. Test circuit shown in Figure 1. 2-Tone IF Output Power, IM3 and IM5 vs RF Input Power
20 10 OUTPUT POWER/TONE (dBm) 0 -10 -20 -30 -40 -50 -60 -70 -80 -12 IM3 IM5 -9 -6 -3 0 3 RF INPUT POWER (dBm/TONE) 6
5541 G13
TYPICAL AC PERFORMANCE CHARACTERISTICS
Single-Tone IF Output Power, 2 x 2 and 3 x 3 Spurs vs RF Input Power
20 IFOUT OUTPUT POWER (dBm) RF1 = 1949MHz RF2 = 1951MHz LO = 1760MHz IFOUT 10 (RF = 1950MHz) 0 -10 -20 -30 -40 -50 -60 -70 -80 -12 -9 2RF-2LO (RF = 1855MHz) 3RF-3LO (RF = 1823.33MHz) LO = 1760MHz
2 x 2 and 3 x 3 Spur Suppression vs LO Power
-50 -55 -60 -65 -70 -75 -80 3RF-3LO (RF = 1823.33MHz) -6 -4 4 -2 0 2 LO INPUT POWER (dBm) 6
5541 G15
RELATIVE SPUR LEVEL (dBc)
RF = 1950MHz PRF = -10dBm LO = 1760MHz
2RF-2LO (RF = 1855MHz)
3 6 9 -6 -3 0 RF INPUT POWER (dBm)
12
15
5541 G14
SSB Noise Figure vs RF Blocker Level
17 16 15 ISOLATION (dB) SSB NF (dB) 14 13 12 11 10 9 -25 PLO = 3dBm 0 -20 -15 -10 -5 RF BLOCKER POWER (dBm) 5
5541 G16
LO Switch Isolation vs LO Frequency-LO1 Selected
60 PLO2 = -3dBm 55 ISOLATION (dB) PLO2 = 0dBm 50 PLO2 = 3dBm 45 LOSEL = LOW PLO1 = 0dBm 1.4 1.6 1.8 2.0 LO FREQUENCY (GHz) 2.2
5541 G17
LO Switch Isolation vs LO Frequency-LO2 Selected
60 PLO1 = -3dBm 55 PLO1 = 0dBm 50
RF = 1950MHz BLOCKER = 2050MHz
PLO = -3dBm PLO = 0dBm
45
PLO1 = 3dBm
40 1.2
40 1.2
LOSEL = HIGH PLO2 = 0dBm 1.4 1.6 1.8 2.0 LO FREQUENCY (GHz) 2.2
5541 G18
Conversion Gain Distribution
40 35 30 DISTRIBUTION (%) DISTRIBUTION (%) 25 20 15 10 5 0 6.9 7.1 7.3 7.5 7.7 7.9 8.1 8.3 8.5 CONVERSION GAIN (dB)
5541 G18a
IIP3 Distribution
85C 25C -40C 20 18 16 14 12 10 8 6 4 2 0 25.0 25.4 25.8 26.2 26.6 IIP3 (dBm) 27.0 27.4
5541 G18b
SSB Noise Figure Distribution
85C 25C -40C DISTRIBUTION (%) 35 30 25 20 15 10 5 0 8.2 8.6 9.0 9.4 9.8 10.2 10.6 11.0 SSB NOISE FIGURE (dB)
5541 G18c
RF = 1950MHz
RF = 1950MHz
RF = 1950MHz
85C 25C -40C
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LTC5541
High-Side LO VCC = 3.3V, VCCIF = 3.3V, SHDN = Low, TA = 25C, PLO = 0dBm, PRF = -3dBm (-3dBm/tone for two-tone IIP3 tests, f = 2MHz), IF = 190MHz, unless otherwise noted. Test circuit shown in Figure 1. Conversion Gain, IIP3 and NF vs RF Frequency
25 IIP3 GC (dB), IIP3 (dBm), SSB NF (dB) 23 21 19 17 15 13 11 9 7 1250 1350 GC 1450 1550 1650 1750 RF FREQUENCY (MHz) 1850 SSB NF GC (dB), IIP3 (dBm), P1dB (dBm) 23 21 19 17 15 13 11 9 7 -45 P1dB GC -25 55 -5 15 35 TEMPERATURE (C) 75 95 VCCIF = 5.0V VCCIF = 3.3V 25 IIP3 GC (dB), IIP3 (dBm), P1dB (dBm)
TYPICAL AC PERFORMANCE CHARACTERISTICS
1450MHz Conversion Gain, IIP3 and RF Input P1dB vs Temperature
25 23 21 19 17 15 13 11 9
1750MHz Conversion Gain, IIP3 and RF Input P1dB vs Temperature
IIP3
VCCIF = 5.0V VCCIF = 3.3V
P1dB
GC 7 -45 -25
-5 15 35 55 TEMPERATURE (C)
75
95
5541 G19
5541 G20
5541 G21
1450MHz Conversion Gain, IIP3 and NF vs LO Power
26 IIP3 24 22 GC (dB), IIP3 (dBm) 20 18 16 14 12 10 8 -6 -4 4 -2 0 2 LO INPUT POWER (dBm) 6
5541 G22
1600MHz Conversion Gain, IIP3 and NF vs LO Power
18 16 14 GC (dB), IIP3 (dBm) 12 SSB NF (dB) 10 27 25 23 21 19 17 15 13 11 9 7 -6 -4 4 -2 0 2 LO INPUT POWER (dBm) 6
5541 G22b
1750MHz Conversion Gain, IIP3 and NF vs LO Power
20 25 23 21 GC (dB), IIP3 (dBm) 19 17 15 13 11 9 7 -6 -4 4 -2 0 2 LO INPUT POWER (dBm) 6
5541 G23
IIP3
18 16 14 12 SSB NF (dB) 10 NF 8
IIP3
18 16 14 SSB NF (dB) 12 10 NF 8 85C 6 25C -40C 4
NF
8
85C 6 25C -40C 4 GC 2 0
85C 6 25C -40C 4 GC 2 0
GC
2 0
2-Tone IF Output Power, IM3 and IM5 vs RF Input Power
20 10 OUTPUT POWER/TONE (dBm) 0 -10 RF1 = 1599MHz -20 RF2 = 1601MHz -30 LO = 1790MHz -40 -50 -60 -70 -80 -12 3 -9 -6 -3 0 RF INPUT POWER (dBm/TONE) 6
5541 G24
Single-Tone IF Output Power, 2 x 2 and 3 x 3 Spurs vs RF Input Power
20 IFOUT 10 (RF = 1600MHz) OUTPUT POWER (dBm) LO = 1790MHz RELATIVE SPUR LEVEL (dBc) 0 -10 -20 -30 -40 -50 -60 -70 -80 -12 -9 -80 3 6 9 -6 -3 0 RF INPUT POWER (dBm) 12 15 3LO-3RF (RF = 1726.67MHz) 2LO-2RF (RF = 1695MHz) -50 -55 -60 -65 -70 -75
2 x 2 and 3 x 3 Spur Suppression vs LO Power
RF = 1600MHz PRF = -10dBm LO = 1790MHz
IFOUT
2LO-2RF (RF = 1695MHz)
IM3
IM5
3LO-3RF (RF = 1726.67MHz) -6 -4 4 -2 0 2 LO INPUT POWER (dBm) 6
5541 G26
5541 G25
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LTC5541 PIN FUNCTIONS
NC (Pin 1): This pin is not connected internally. It can be left floating, connected to ground or to VCC . RF (Pin 2): Single-Ended Input for the RF Signal. This pin is internally connected to the primary side of the RF input transformer, which has low DC resistance to ground. A series DC-blocking capacitor should be used to avoid damage to the integrated transformer. The RF input is impedance matched, as long as the selected LO input is driven with a 0dBm 6dB source between 1.4GHz and 2GHz. CT (Pin 3): RF Transformer Secondary Center-Tap. This pin may require a bypass capacitor to ground. See the Applications Information section. This pin has an internally generated bias voltage of 1.2V. It must be DC-isolated from ground and VCC. GND (Pins 4, 10, 12, 13, 17, Exposed Pad Pin 21): Ground. These pins must be soldered to the RF ground plane on the circuit board. The exposed pad metal of the package provides both electrical contact to ground and good thermal contact to the printed circuit board. SHDN (Pin 5): Shutdown Pin. When the input voltage is less than 0.3V, the internal circuits supplied through pins 6, 8, 14, 18 and 19 are enabled. When the input voltage is greater than 3V, all circuits are disabled. Typical input current is less than 10A. This pin must not be allowed to float. VCC2 (Pin 6) and VCC1 (Pin 8): Power Supply Pins for the LO Buffer and Bias Circuits. These pins are internally connected and must be externally connected to a regulated 3.3V supply, with bypass capacitors located close to the pin. Typical current consumption is 92mA. LOBIAS (Pin 7): This Pin Allows Adjustment of the LO Buffer Current. Typical DC voltage is 2.2V. LOSEL (Pin 9): LO1/LO2 Select Pin. When the input voltage is less than 0.3V, the LO1 port is selected. When the input voltage is greater than 3V, the LO2 port is selected. Typical input current is 11A for LOSEL = 3.3V. This pin must not be allowed to float. LO1 (Pin 11) and LO2 (Pin 15): Single-Ended Inputs for the Local Oscillators. These pins are internally biased at 0V and require external DC blocking capacitors. Both inputs are internally matched to 50, even when the chip is disabled (SHDN = high). VCC3 (Pin 14): Power Supply Pin for the LO Switch. This pin must be connected to a regulated 3.3V supply and bypassed to ground with a capacitor near the pin. Typical DC current consumption is less than 100A. IFGND (Pin 16): DC Ground Return for the IF Amplifier. This pin must be connected to ground to complete the IF amplifier's DC current path. Typical DC current is 100mA. IF - (Pin 18) and IF + (Pin 19): Open-Collector Differential Outputs for the IF Amplifier. These pins must be connected to a DC supply through impedance matching inductors, or a transformer center-tap. Typical DC current consumption is 50mA into each pin. IFBIAS (Pin 20): This Pin Allows Adjustment of the IF Amplifier Current. Typical DC voltage is 2.1V.
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LTC5541 BLOCK DIAGRAM
20 19 18 16 21 IF+ IFBIAS IF - IFGND EXPOSED PAD IF AMP 2 RF LO AMP CT SHDN PASSIVE MIXER BIAS LOSEL 9 LO1 11 LO2 15 VCC3 14
3 5
VCC2
6
VCC1
8
7
LOBIAS GND PINS ARE NOT SHOWN
5541 BD
TEST CIRCUIT
4:1 T1 C10 L1 VCCIF 3.1V TO 5.3V 100mA L2 IFOUT 190MHz 50
L1, L2 vs IF Frequencies IF (MHz) 140 190 240 L1, L2 (nH) 270 150 100 56 33
C9
C8
20 IFBIAS 1 NC C1 RFIN 50 2 RF
19 IF+
18 IF -
17 GND
16 IFGND LO2 15 C4 LO2IN 50
300 380
REF DES
VCC3 14 C7
VALUE 2.2pF 22pF 1F 1000pF 150nH TC4-1W-7ALN+ (WBC4-6TLB)
SIZE 0402 0402 0603 0402
COMMENTS AVX AVX AVX AVX Mini-Circuits (Coilcraft)
C1 C3, C4, C6, C7, C8 C5, C9 C10
C3
3 CT
LTC5541
GND 13
4 GND
GND 12
L1, L2
LO1IN 50
0603 Coilcraft 0603CS
SHDN (0V/3.3V)
5 SHDN VCC2 6
LOBIAS 7
VCC1 8
LOSEL 9
LO1 11 GND 10
T1 (Alternate)
VCC 3.1V TO 3.5V 92mA
C5
C6
5541 TC
LOSEL (0V/3.3V) RF GND DC1431A BOARD BIAS STACK-UP GND (NELCO N4000-13)
0.015" 0.062" 0.015"
Figure 1. Standard Downmixer Test Circuit Schematic (190MHz IF)
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LTC5541 APPLICATIONS INFORMATION
Introduction The LTC5541 consists of a high linearity passive doublebalanced mixer core, IF buffer amplifier, high speed singlepole double-throw (SPDT) LO switch, LO buffer amplifier and bias/shutdown circuits. See Block Diagram section for a description of each pin function. The RF and LO inputs are single-ended. The IF output is differential. Low-side or high-side LO injection can be used. The evaluation circuit, shown in Figure 1, utilizes bandpass IF output matching and an IF transformer to realize a 50 single-ended IF output. The evaluation board layout is shown in Figure 2. applications. When used, C2 should be located within 2mm of pin 3 for proper high-frequency decoupling. The nominal DC voltage on the CT pin is 1.2V. For the RF input to be matched, the selected LO input must be driven. A broadband input match is realized with C1 = 2.2pF. The measured input return loss is shown in Figure 4 for LO frequencies of 1.4GHz, 1.75GHz and 2GHz. These LO frequencies correspond to the lower, middle and upper values of the LO range. As shown in Figure 4, the RF input impedance is somewhat dependent on LO frequency, although a single value of C1 is adequate to cover the 1.3GHz-2.3GHz RF band.
TO MIXER
RFIN
C1 2
RF
3 C2
CT
LTC5541
5541 F02
5541 F03
Figure 2. Evaluation Board Layout
Figure 3. RF Input Schematic
0 -5 LO = 2GHz RETURN LOSS (dB) -10 -15 -20 LO = 1.4GHz -25 LO = 1.75GHz -30 1.0 1.5 2.0 2.5 FREQUENCY (GHz) 3.0
5541 F04
RF Input The mixer's RF input, shown in Figure 3, is connected to the primary winding of an integrated transformer. A 50 match is realized when a series capacitor, C1, is connected to the RF input. C1 is also needed for DC blocking if the RF source has DC voltage present, since the primary side of the RF transformer is DC-grounded internally. The DC resistance of the primary is approximately 3.6. The secondary winding of the RF transformer is internally connected to the passive mixer. The center-tap of the transformer secondary is connected to pin 3 (CT) to allow the connection of bypass capacitor, C2. The value of C2 is LO frequency-dependent and is not required for most
Figure 4. RF Input Return Loss
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10
LTC5541 APPLICATIONS INFORMATION
The RF input impedance and input reflection coefficient, versus RF frequency, is listed in Table 1. The reference plane for this data is pin 2 of the IC, with no external matching, and the LO is driven at 1.75GHz.
Table 1. RF Input Impedance and S11 (at Pin 2, No External Matching, LO Input Driven at 1.75GHz)
FREQUENCY (GHz) 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6 2.8 3.0 INPUT IMPEDANCE 24.1 + j42.1 33.1 + j47.2 43.6 + j49.2 58.0 + j47.1 50.2 + j20.6 43.0 + j32.4 43.7 + j37.8 44.1 + j44.4 49.0 + j51.7 56.8 + j57.6 68.9 + j61.0 S11 MAG 0.58 0.53 0.47 0.41 0.20 0.34 0.39 0.43 0.47 0.48 0.48 ANGLE 92.1 79.8 69.7 56.9 77.8 82.9 79.0 72.4 63.6 55.0 45.7
The LO switch is designed for high isolation and fast (<50ns) switching. This allows the use of two active synthesizers in frequency-hopping applications. If only one synthesizer is used, then the unused LO input may be grounded. The LO switch is powered by VCC3 (Pin 14) and controlled by the LOSEL logic input (Pin 9). The LO1 and LO2 inputs are always 50-matched when VCC is applied to the chip, even when the chip is shutdown. The DC resistance of the selected LO input is approximately 23 and the unselected input is approximately 50. A logic table for the LO switch is shown in Table 2. Measured LO input return loss is shown in Figure 6.
Table 2. LO Switch Logic Table
LOSEL Low High ACTIVE LO INPUT LO1 LO2
LTC5541 LO2 15 LO BUFFER VCC3 TO MIXER 14 C4 LO2IN
The LO amplifiers are powered by VCC1 and VCC2 (pin 8 and pin 6). When the chip is enabled (SHDN = low), the internal bias circuit provides a regulated 4mA current to the amplifier's bias input, which in turn causes the amplifiers to draw approximately 80mA of DC current. This 4mA reference current is also connected to LOBIAS (Pin 7) to allow modification of the amplifier's DC bias current for special applications. The recommended application circuits require no LO amplifier bias modification, so this pin should be left open-circuited.
0 C3 = C4 = 22pF
4mA BIAS
LO1 11
C3 LO1IN RETURN LOSS (dB)
-5 -10 -15 -20 -25
SELECTED
7
LOBIAS
6
VCC2
8
VCC1
9
LOSEL
5541 F05
Figure 5. LO Input Schematic
NOT SELECTED OR SHUTDOWN
LO Inputs The mixer's LO input circuit, shown in Figure 5, consists of an integrated SPDT switch, a balun transformer, and a two-stage high-speed limiting differential amplifier to drive the mixer core. The LTC5541's LO amplifiers are optimized for the 1.4GHz to 2.0GHz LO frequency range. LO frequencies above or below this frequency range may be used with degraded performance.
-30 0.8
1.1
1.4 1.7 2.0 FREQUENCY (GHz)
2.3
2.6
5541 F06
Figure 6. LO Input Return loss
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11
LTC5541 APPLICATIONS INFORMATION
The nominal LO input level is 0dBm although the limiting amplifiers will deliver excellent performance over a 6dB input power range. LO input power greater than 6dBm may cause conduction of the internal ESD diodes. Series capacitors C3 and C4 optimize the input match and provide DC blocking. The LO1 input impedance and input reflection coefficient, versus frequency, is shown in Table 3. The LO2 port is identical due to the symmetric device layout and packaging.
Table 3. LO1 Input Impedance vs Frequency (at Pin 11, No External Matching, LOSEL = Low)
FREQUENCY (GHz) 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6 2.8 3.0 INPUT IMPEDANCE 55.1 - j21.8 34.5 - j11.4 29.5 - j1.2 29.6 + j6.3 31.6 + j10.9 33.5 + j13.7 35.2 + j16.1 36.9 + j17.8 38.0 + j18.9 38.3 + j19.5 37.3 + j20.4 S11 MAG 0.209 0.225 0.257 0.267 0.261 0.255 0.253 0.251 0.250 0.254 0.270 ANGLE -65.2 -135.9 -176.1 +158.2 +141.5 +130.7 +121.6 +114.4 +110.0 +108.3 +108.5
T1 4:1 R1 (OPTION TO REDUCE DC POWER) 20 19 C10 L1 VCCIF C8 IF+ IF - 18 L2 100mA L3 (OR SHORT) IFOUT
IFBIAS
16
IFGND
VCC IF AMP 4mA BIAS LTC5541
5541 F07
Figure 7. IF Amplifier Schematic with Bandpass Match
transformer or discrete IF balun circuit. The evaluation board (see Figures 1 and 2) uses a 4:1 ratio IF transformer for impedance transformation and differential to singleended transformation. It is also possible to eliminate the IF transformer and drive differential filters or amplifiers directly. The IF output impedance can be modeled as 300 in parallel with 2.3pF at IF frequencies. An equivalent smallsignal model (including bondwire inductance) is shown in Figure 8. Frequency-dependent differential IF output impedance is listed in Table 4. This data is referenced to the package pins (with no external components) and includes the effects of IC and package parasitics.
19 IF+ 18 IF -
IF Output The IF amplifier, shown in Figure 7, has differential opencollector outputs (IF+ and IF -), a DC ground return pin (IFGND), and a pin for modifying the internal bias (IFBIAS). The IF outputs must be biased at the supply voltage (VCCIF), which is applied through matching inductors L1 and L2. Alternatively, the IF outputs can be biased through the center tap of a transformer. Each IF output pin draws approximately 50mA of DC supply current (100mA total). IFGND (pin 16) must be grounded or the amplifier will not draw DC current. Grounding through inductor L3 may improve LO-IF and RF-IF leakage performance in some applications, but is otherwise not necessary. High DC resistance in L3 will reduce the IF amplifier supply current, which will degrade RF performance. For optimum single-ended performance, the differential IF outputs must be combined through an external IF
0.9nH RIF CIF
0.9nH
LTC5541
5541 F08
Figure 8. IF Output Small-Signal Model
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12
LTC5541 APPLICATIONS INFORMATION
Bandpass IF Matching The IF output can be matched for IF frequencies as low as 90MHz or as high as 500MHz using the bandpass IF matching shown in Figure 1 and Figure 7. L1 and L2 resonate with the internal IF output capacitance at the desired IF frequency. The value of L1, L2 is calculated as follows: L1, L2 = 1/[(2 fIF)2 * 2 * CIF] where CIF is the internal IF capacitance (listed in Table 4). Values of L1 and L2 are tabulated in Figure 1 for various IF frequencies. For IF frequencies below 90MHz, the values of L1, L2 become unreasonably high and the lowpass topology shown in Figure 9 is preferred. Measured IF output return loss for bandpass IF matching is plotted in Figure 10.
Table 4. IF Output Impedance vs Frequency
FREQUENCY (MHz) 90 140 190 240 300 380 500 DIFFERENTIAL OUTPUT IMPEDANCE (RIF || XIF (CIF)) 329 || -j769 (2.3pF) 314 || -j494 (2.3pF) 305 || -j364 (2.3pF) 310 || -j288 (2.3pF) 303 || -j226 (2.35pF) 289 || -j175 (2.4pF) 273 || -j118 (2.7pF)
-20 50 100 150 200 250 300 350 400 450 IF FREQUENCY (MHz)
5541 F10
4:1 VCCIF 3.1-5.3V C9 L1 19 18 T1
IFOUT 50
C8 L2
IF +
IF - LTC5541
5541 F09
Figure 9. IF Output with Lowpass Matching
0
-5 RETURN LOSS (dB)
-10
L1, L2 = 100nH -15 L1, L2 = 270nH L1, L2 = 150nH
Figure 10. IF Output Return Loss
IF Amplifier Bias The IF amplifier delivers excellent performance with VCCIF = 3.3V, which allows the VCC and VCCIF supplies to be common. With VCCIF increased to 5V, the RF input P1dB increases by approximately 3dB, at the expense of higher power consumption. Mixer performance at 1950MHz is shown in Table 5 with VCCIF = 3.3V and 5V. For the highest conversion gain, high-Q wire-wound chip inductors are recommended for L1 and L2, especially when using VCCIF = 3.3V. Low-cost multilayer chip inductors may be substituted, with a slight reduction in conversion gain.
Table 5. Performance Comparison with VCCIF = 3.3V and 5V (RF = 1950MHz, Low-Side LO, IF = 190MHz)
VCCIF 3.3V 5V ICCIF (mA) 100 102 GC (dB) 7.8 7.7 P1dB (dBm) 11.3 14.6 IIP3 (dBm) 26.4 27.3 NF (dB) 9.6 9.7
5541f
Lowpass IF Matching An alternative IF matching network shown in Figure 9 uses a lowpass topology, which provides excellent RF to IF and LO to IF isolation. VCCIF is supplied through the center tap of the 4:1 transformer. Similar to the bandpass topology, L1 and L2 cancel out the reactive part of the internal capacitance and the impedance transformation is realized by the 4:1 transformer. This topology is preferred for low IF frequencies since L1 and L2 may be replaced with shorts. The LTC5541 demo board (see Figure 2) has been laid out to accommodate this matching topology with very few modifications.
13
LTC5541 APPLICATIONS INFORMATION
The IFBIAS pin (pin 20) is available for reducing the DC current consumption of the IF amplifier, at the expense of IIP3. This pin should be left open-circuited for optimum performance. The internal bias circuit produces a 4mA reference for the IF amplifier, which causes the amplifier to draw approximately 100mA. If resistor R1 is connected to pin 20 as shown in Figure 7, a portion of the reference current can be shunted to ground, resulting in reduced IF amplifier current. For example, R1 = 1k will shunt away 1.5mA from pin 20 and the IF amplifier current will be reduced by 38% to approximately 62mA. The nominal, open-circuit DC voltage at pin 20 is 2.1V. Table 6 lists RF performance at 1950MHz versus IF amplifier current.
Table 6. Mixer Performance with Reduced IF Amplifier Current (RF = 1950MHz, Low-Side LO, IF = 190MHz) VCCIF =3.3V
R1 (k) OPEN 4.7 2.2 1 VCCIF = 5V R1 (k) OPEN 4.7 2.2 1 ICCIF (mA) 102 92 83 65 GC (dB) 7.7 7.5 7.2 6.7 IIP3 (dBm) 27.3 27.2 26.5 24.7 P1dB (dBm) 14.6 14.7 14.8 14.0 NF (dB) 9.7 9.6 9.6 9.7 ICCIF (mA) 100 90 81 62 GC (dB) 7.8 7.5 7.4 6.9 IIP3 (dBm) 26.4 26.0 25.3 23.4 P1dB (dBm) 11.4 11.6 11.7 11.7 NF (dB) 9.6 9.6 9.5 9.7
5541 F11
The SHDN pin must be pulled high or low. If left floating, then the on/off state of the IC will be indeterminate. If a three-state condition can exist at the SHDN pin, then a pull-up or pull-down resistor must be used.
LTC5541 VCC2 6
SHDN 5
500
Figure 11. Shutdown Input Circuit
Supply Voltage Ramping Fast ramping of the supply voltage can cause a current glitch in the internal ESD protection circuits. Depending on the supply inductance, this could result in a supply voltage transient that exceeds the maximum rating. A supply voltage ramp time of greater than 1ms is recommended.
Shutdown Interface Figure 11 shows a simplified schematic of the SHDN pin interface. To disable the chip, the SHDN voltage must be higher than 3.0V. If the shutdown function is not required, the SHDN pin should be connected directly to GND. The voltage at the SHDN pin should never exceed the power supply voltage (VCC) by more than 0.3V. If this should occur, the supply current could be sourced through the ESD diode, potentially damaging the IC.
5541f
14
LTC5541 PACKAGE DESCRIPTION
UH Package 20-Lead Plastic QFN (5mm x 5mm)
(Reference LTC DWG # 05-08-1818 Rev O)
0.70 0.05 5.50 0.05 4.10 0.05 2.60 REF 2.70 0.05 2.70 0.05
PACKAGE OUTLINE 0.25 0.05 0.65 BSC RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED 0.75 5.00 0.10 0.05 R = 0.05 TYP R = 0.125 TYP PIN 1 NOTCH R = 0.30 TYP OR 0.35 45 CHAMFER 19 20 0.40 1 2.70 5.00 0.10 2.60 REF 2.70 0.10 0.10 2 0.10
PIN 1 TOP MARK (NOTE 6)
(UH20) QFN 0208 REV O
0.200 REF 0.00 - 0.05
0.25
0.05
0.65 BSC
NOTE: BOTTOM VIEW--EXPOSED PAD 1. DRAWING IS NOT A JEDEC PACKAGE OUTLINE 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.20mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE
Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
5541f
15
LTC5541 TYPICAL APPLICATION
Wideband Receiver
1nF VCCIF 3.3V or 5V 1nF 150nH IF+ IMAGE BPF 2.2pF LNA RF LO IF IF - 22pF LTC5541 LO2 GC (dB) SYNTH 2 ALTERNATE LO FOR FREQUENCY-HOPPING 22pF SHDN (0V/3.3V) SHDN BIAS VCC2 VCC 3.3V 1F VCC1 22pF VCC3 LO1 LOSEL LO SELECT (0V/3.3V) SYNTH 1 LO 1760MHz
5541 TA03
190MHz SAW IF AMP
190MHz BPF ADC 8.8 8.6
Wideband Conversion Gain, IIP3 and NF vs IF Output Frequency
28 IIP3 26 24 IIP3 (dBm), SSB NF (dB) 22 20 18 16 14 12 10 NF 190 200 170 180 210 IF OUTPUT FREQUENCY (MHz) 8 220
1F
22pF
150nH
RF = 1950 30MHz 8.4 LO = 1760MHz P = 0dBm 8.2 LO TEST CIRCUIT IN FIGURE 1 8.0 7.8 7.6 7.4 7.2 7.0 6.8 160 GC
RF 1920MHz TO 1980MHz
5541 TA04
RELATED PARTS
PART NUMBER Infrastructure LT5527 LTC6400-X LTC6401-X LTC6416 LTC6412 LT5554 LT5557 LT5575 DESCRIPTION 400MHz to 3.7GHz, 5V Downconverting Mixer 300MHz Low Distortion IF Amp/ADC Driver 140MHz Low Distortion IF Amp/ADC Driver 2GHz 16-Bit ADC Buffer 31dB Linear Analog VGA Ultralow Distort IF Digital VGA 400MHz to 3.8GHz 3.3V Downconverting Mixer COMMENTS 2.3dB Conversion Gain, 23.5dBm IIP3 and 12.5dB NF at 1900MHz, 5V/78mA Supply Fixed Gain of 8dB, 14dB, 20dB and 26dB; >36dBm OIP3 at 300MHz, Differential I/O Fixed Gain of 8dB, 14dB, 20dB and 26dB; >40dBm OIP3 at 140MHz, Differential I/O 40.25dBm OIP3 to 300MHz, Programmable Fast Recovery Output Clamping 35dBm OIP3 at 240MHz, Continuous Gain Range -14dB to 17dB 48dBm OIP3 at 200MHz, 2dB to 18dB Gain Range, 0.125dB Gain Steps 2.9dB Conversion Gain, 24.7dBm IIP3 and 11.7dB NF at 1950MHz, 3.3V/82mA Supply Integrated Baluns, 28dBm IIP3, 13dBm P1dB, 0.03dB I/Q Amplitude Match, 0.4 Phase Match 27dBm OIP3 at 900MHz, 24.2dBm at 1.95GHz, Integrated RF Transformer 27.3dBm OIP3 at 2.14GHz, NF = 9.9dB, 3.3V Supply, Single-Ended LO and RF Ports 27.7dBm OIP3 at 140MHz, 22.9dBm at 900MHz, -161.2dBm/Hz Noise Floor 1dB Output Variation over Temperature, 38ns Response Time, Log Linear Response Low Frequency to 1GHz, 83dB Log Linear Dynamic Range 0.5dB Accuracy Over Temperature and >50dB Dynamic Range, Fast 500ns Rise Time 40dB Dynamic Range, 1dB Accuracy Over Temperature, 1.5mA Supply Current 78dBFS Noise Floor, >83dB SFDR at 250MHz 72.8dB SNR, 88dB SFDR, 149mW Power Consumption 65.4dB SNR, 78dB SFDR, 740mW Power Consumption
5541f LT 1209 * PRINTED IN USA
700MHz to 2.7GHz Direct Conversion I/Q Demodulator LT5578 400MHz to 2.7GHz High Linearty Upconverting Mixer LT5579 1.5GHz to 3.8GHz High Linearity Upconverting Mixer LTC5598 5MHz to 1.6GHz I/Q Modulator RF Power Detectors LT5534 50MHz to 3GHz Log RF Power Detector with 60dB Dynamic Range LT5537 Wide Dynamic Range Log RF/IF Detector LT5570 2.7GHz Mean-Squared Detector LT5581 ADCs LTC2208 LTC2262-14 LTC2242-12 6GHz Low Power RMS Detector 16-Bit, 130Msps ADC 14-Bit, 150Msps ADC Ultralow Power at 1.8V Supply 12-Bit, 250Msps ADC
16 Linear Technology Corporation
(408) 432-1900 FAX: (408) 434-0507
1630 McCarthy Blvd., Milpitas, CA 95035-7417
www.linear.com
(c) LINEAR TECHNOLOGY CORPORATION 2009

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